(b) Design a synchronous counter using three positive-edged triggered JK flip-flops that rotate based on the following sequence. $[1+2+3+1$ marks $]$ $100,010,101,000,111,001$ and repeats. Those undesired states go to Don't Care on the next clock pulse. Your design should include: Show all steps. (i) State Transition Diagram by showing all possible states (ii) Circuit Excitation State Table. (iii) Perform Karnaugh Map simplification for each of positive-edged triggered JK flip-flops inputs. (iv) Draw the synchronous counter

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